feat: add `verible` for [System]Verilog filesHEADmaster

1 files changed, 5 insertions, 0 deletions

diff --git a/flake.nix b/flake.nix
index 5319107..9f2e478 100644
--- a/flake.nix
+++ b/flake.nix
@@ -171,6 +171,11 @@
                 typescript-language-server
               ];
 
+              verilog = [
+                verible
+                verilator
+              ];
+
               debug = [
                 lldb
               ];